Thursday, December 24, 2009

Assembly Language Part 3

For 8086 programs to perform useful tasks, there must be a way to make decisions and repeat sections of the code. Inthis section we will discuss the the basic flow control instructions of MASM

In assembly program flow is managed by jumping isntructions. There are 2 types of jump

1) Unconditional
             The JMP instruction causes an unconditional transfer of control. The basic form is-
            JMP label

2)Conditional
            The transfer of control depends on the previous instruction. It is often done by CMP. for example
          CMP operand1,operand2
          Jxx    end

Here the jump Jxx can be any of the following -

Jcc Instructions for Signed Comparisons
Instruction
Description
Condition
Aliases
Opposite
JG
Jump if greater (>)
Sign = Ovrflw or Zero=0
JNLE
JNG
JNLE
Jump if not less than or equal (not <=)
Sign = Ovrflw or Zero=0  
JG
JLE
JGE
Jump if greater than or equal (>=)
Sign = Ovrflw
JNL
JGE
JNL
Jump if not less than (not <)
Sign = Ovrflw
JGE
JL
JL
Jump if less than (<)
Sign Ovrflw
JNGE
JNL
JNGE
Jump if not greater or equal (not >=)
Sign Ovrflw  
JL
JGE
JLE
Jump if less than or equal (<=)
Sign Ovrflw or Zero = 1
JNG
JNLE
JNG
Jump if not greater than (not >)
Sign Ovrflw or Zero = 1
JLE
JG
JE
Jump if equal (=)
Zero = 1
JZ
JNE
JNE
Jump if not equal ()
Zero = 0
JNZ
JE






Jcc Instructions That Test Flags
Instruction
Description
Condition
Aliases
Opposite
JC
Jump if carry
Carry = 1
JB, JNAE
JNC
JNC
Jump if no carry
Carry = 0
JNB, JAE
JC
JZ
Jump if zero
Zero = 1
JE
JNZ
JNZ
Jump if not zero
Zero = 0
JNE
JZ
JS
Jump if sign
Sign = 1
-
JNS
JNS
Jump if no sign
Sign = 0
-
JS
JO
Jump if overflow
Ovrflw=1
-
JNO
JNO
Jump if no Ovrflw
Ovrflw=0
-
JO
JP
Jump if parity
Parity = 1
JPE
JNP
JPE
Jump if parity even
Parity = 1
JP
JPO
JNP
Jump if no parity
Parity = 0
JPO
JP
JPO
Jump if parity odd
Parity = 0
JNP
JPE








Jcc Instructions for Unsigned Comparisons
Instruction
Description
Condition
Aliases
Opposite
JA
Jump if above (>)
Carry=0, Zero=0
JNBE
JNA
JNBE
Jump if not below or equal (not <=)
Carry=0, Zero=0
JA
JBE
JAE
Jump if above or equal (>=)
Carry = 0
JNC, JNB
JNAE
JNB
Jump if not below (not <)
Carry = 0
JNC, JAE
JB
JB
Jump if below (<)
Carry = 1
JC, JNAE
JNB
JNAE
Jump if not above or equal (not >=)
Carry = 1
JC, JB
JAE
JBE
Jump if below or equal (<=)
Carry = 1 or Zero = 1
JNA
JNBE
JNA
Jump if not above (not >)
Carry = 1 or Zero = 1
JBE
JA
JE
Jump if equal (=)
Zero = 1
JZ
JNE
JNE
Jump if not equal ()
Zero = 0
JNZ
JE




 As we have seen earlier that the conditional jump isntruction is often followed by the CMP instruction. Wnen CPU executes the CMP instruction it compares the first operand with the second operand. Then if the condition described by the following jump instruction is true - a change of flow control is occured. You may want to see the example -

       CMP AX,BX
       JL  axislower    ;  If AX is lower than BX then control transferred to axislower

The TEST instruction
    The TEST instruction performs an AND operation, but does not store
the result. It only sets the FLAGS register based on what the result would
be (much like how the CMP instruction performs a subtraction but only sets
FLAGS).

TEST DESTINATION, SOURCE


Effect on flags -
SF,ZF, PF - Reflect the result
AF  -  Undefined
CF,OF - 0                    

The test instruction can be used to examine individual bits in a operand. For that case the mask(source) should contain 1s in the desired bit positions and 0s in the rest. See the pseudocode and MASM code -

IF AL is EVEN
   THEN JUMP TO END_X

MASM code-

TEST AL,1
JZ END_X

END_X:
  

If we wish to check the 1st bit we TEST it by 1. (here the mask is 1 i.e = 0000 0001 in binary. And we know that an even number shall have 1 in the 1st bit position.)
The and product should be zero if 1st bit is 0, the AL would then remain same but the ZF (zero flag = 0 if result is zero) is 0. So the JZ instruction shall be executed.

 Further reading:
 The art of Assembly Language             URL:  http://www.arl.wustl.edu/

 The Intel Microprocessor Architecture, Programming & Interfacing
    by  Barry B. Brey

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